SIAM PP 2024

Smart Networks in HPC: For Fun or Profit (or Both)?

Organizers: Richard Vuduc, Georgia Institute of Technology; Jeffrey Young, Georgia Institute of Technology; Hyesoon Kim, Georgia Institute of Technology

This minisymposium asks what new opportunities exist to speed up HPC applications using “smart networks,” i.e., networks with computational processors as part of the network fabric itself. Such infrastructures have existed in HPC historically, but the new trend is to develop and deploy them in massive-scale data centers. Will smart networks for data center workloads benefit HPC, too? By analogy, commercial processors specialized for graphics – i.e., GPUs – became more general-purpose and affordable to deploy in HPC systems. Will a similar economy of scale apply to smart networks, albeit one that accelerates communication rather than computation, as GPUs do?

To help the audience draw a conclusion, the talks cover application case studies, algorithms, libraries and middleware, runtime systems, compilers and programming systems, and hardware. This full-stack view will illuminate the many crosscutting issues at play and allow participants with diverse interests to engage with the topic.

Do Research with SmartNICs

Are you interested to investigate SmartNICs more or use them for your research? Most academic-related researchers can apply to our CRNCH Rogues Gallery testbed, which hosts NVIDIA BlueField 2 and 3 SmartNICs, FPGA-based SmartNICs, and related software like ODOS.

Presenter Slides and Citation

Please see this link to our Figshare with all the speaker presentations.

We hope you find these presentations interesting and useful for your own work. Please cite individual talks using the provided DOI as follows:

Example text citation: Coming Soon!

Bibtex citation (can also be pulled from FigShare for each presentation):

Coming Soon!

Event Agenda

Tuesday, March 5th; 1:00 PM – 3:00 PM; MS4